Here are a few photos of the kinds of things I work with (although I do NOT work for Intel):

Photos: Intel’s 45-nanometer process

The first photo is of a wafer, the size of this one is 300mm, or the same as that of an LP record (for those old enough to remember them), 12 inches across.

The second photo is of what we refer to as a “test chip” which is a set of special structures we use to develop the technology needed to make true integrated circuit chips on an industrial scale cheaply enough and with sufficient performance for us to sell them and make money (that is the point behind all of this, to make money for the company, you know…)

It appears to me that the third photo is of what we call an “SRAM bitcell” which is part of the cache memory in a CPU like a Pentium or PowerPC. The bitcell holds one bit, in other words, a one or a zero, used in the memory. The area required for one bitcell is a measure of how effecient a technology is in using space on a chip, and it is the reduction of space on a chip which is one of many factors that has played a role to increase performance of electronics in the past two decades.

There is no scale marker on the third photo, but my guess based upon a true 45nm technology would imply that the size of the horizontal bars you see is about 35 to 38nm from top to bottom. This is smaller than the average virus, and far smaller than a bacterium. A human hair is thousands of times larger. To give additional perspective, the average distance between atoms in some of the materials we use to make the chips, like silicon dioxide (also known as “glass”) is about 0.05nm.

In other words, a 35nm line is about 700 or so atoms across.

We are now making structures small enough that they measure less than a thousand atoms across, and even more startlingly, some are less than 6 atoms thick!

If that ain’t “geek cool” I don’t know what is…

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